Project calls for intelligent micro-scale tester

Tester will be based on T3Ster, MicReD's world-leading transient test equipment for semiconductor chip package thermal characterisation

Flomerics' MicReD subsidiary will play a major role in the recently announced European-funded Nanopack project, which aims to address thermal barriers to continued performance increases in semiconductors and power electronics by developing new technologies and materials for low thermal resistance interfaces and electrical interconnects.Transistor downscaling is forcing a focus on heterogeneous integration and 3D packaging technologies to improve performance by reducing interconnect length between memory and multicore logic.

In order to remove heat from the intricate layered assemblies, low-resistance thermal interfaces need to be combined with high-density electrical interconnects.

Power electronics applications in hybrid vehicles and power supplies are reaching integration densities that are already limited by the ability to transfer heat across interfaces to liquid coolers and heatsinks.
The Nanopack consortium will explore systems such as carbon nanotubes, nanoparticles and nano-structured surfaces using different contact-enhancing mechanisms combined with high-volume compatible manufacturing technologies such as electro-spinning.

Recent groundbreaking work on nested channel interfaces will be used to exploit the beneficial properties of the new materials.

Simulation with world-class supercomputers will support the development of experimental test structures to measure the performance of new interface technologies and validate design tools.

Finally, improved performance will be demonstrated in several different applications including high-power radio-frequency switches, microprocessors and hybrid vehicle power electronics.

Within the Nanopack project, MicReD and Budapest University of Technology and Economics (BUTE) will collaborate to create an intelligent micro-scale tester for thermal interface materials enabling thermal resistance measurements with at least one order of magnitude higher accuracy than is possible today.

The new tester will be based on T3Ster, MicReD's world-leading transient test equipment for semiconductor chip package thermal characterisation.

The project results will be disseminated through the organisation of yearly public Nanopack workshops in connection with the existing Therminic Workshops.

The Nanopack project is co-ordinated by Thales Research and Technology.